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data sheet october 2000 L8576B dual ringing slic features n two slic channels for multiple tip/ring interfaces n on-chip balanced ringing generator, no ring relay required n single battery operation or optional automatic bat- tery switch n quiet battery reversal for on-hook signaling n disconnect state n distortion-free, on-hook transmission n 24 ma loop current limiter n ring trip detector n switchhook detector n immune to channel crosstalk and impulse noise n allows rail overvoltages for ease of protection n thermal protection n 44-pin, surface-mount, plastic package (plcc) applications n pots for isdn n terminal adapters (ta) n digital loop carrier (dlc) systems n pabx description the L8576B electronic dual subscriber line interface circuit (slic) provides all the functions that are nec- essary to interface a codec to the tip and ring of a subscriber loop, integrating two battery feeds and ringing generators in one low-cost package. the L8576B device is optimized to meet the needs of short loop, customer premises applications and fea- tures balanced ringing from the single battery supply. the device is built using a 90 v complementary bipo- lar (cbic) process. it is available in a 44-pin plcc package.
table of contents contents page figures page 2 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic features ......................................................................1 applications .................................................................1 description...................................................................1 pin information ............................................................5 functional description .................................................7 general .....................................................................7 protection..................................................................7 tip/ring drivers ........................................................7 battery operation......................................................7 transmit and receive interface ................................7 data interface ...........................................................8 loop current detector ..............................................8 operating states..........................................................8 absolute maximum ratings ........................................9 electrical characteristics ...........................................10 test configurations .................................................. 14 applications ..............................................................15 characteristic curves..............................................15 dc design ................................................................17 power ringing.........................................................18 ac design ................................................................19 use of an auxiliary battery supply..........................24 outline diagram ........................................................25 44-pin plcc ...........................................................25 ordering information .................................................26 tables page table 1. pin descriptions ............................................5 table 2. input state coding ........................................9 table 3. operating conditions and powering ...........10 table 4. ring trip detector ......................................10 table 5. battery feed ...............................................11 table 6. analog signal pins .....................................12 table 7. ac feed characteristics ..............................12 table 8. isolation between channels .......................13 table 9. data interface and logic ............................13 figure 1. architectural diagram ................................. 3 figure 2. typical 600 w application circuit (only one channel shown) ................................. 4 figure 3. 44-pin plcc pin diagram .......................... 5 figure 4. pretrip circuit ............................................ 11 figure 5. basic test circuit ..................................... 14 figure 6. metallic psrr .......................................... 14 figure 7. longitudinal psrr ................................... 14 figure 8. longitudinal balance ................................ 15 figure 9. longitudinal impedance ........................... 15 figure 10. ac gains ................................................. 15 figure 11. receive gain and hybrid balance vs. frequency .............................................. 15 figure 12. transmit gain and return loss vs. frequency .............................................. 15 figure 13. loop current vs. loop voltage ............... 16 figure 14. loop current vs. loop resistance ......... 16 figure 15. slic power dissipation vs. loop resistance (v bat = C48 v) ...................... 16 figure 16. slic power dissipation vs. loop resistance (v bat = C65 v) ...................... 16 figure 17. loop current vs. loop voltage ............... 17 figure 18. ringing waveform crest factor = 1.6 .... 18 figure 19. ringing waveform crest factor = 1.2 .... 18 figure 20. ac equivalent circuit using a t8503 codec ..................................................... 20 figure 21. ac interface circuit using first- generation codec (blocking capacitors not shown) ............................................. 22 figure 22. ac interface circuit using first- generation codec (including blocking capacitors) ............................................. 23
lucent technologies inc. 3 data sheet october 2000 L8576B dual ringing slic description (continued) 12-3362(f).b figure 1. architectural diagram power conditioning & reference v cc v bat cf1 bgnd agnd cf2 battery feed state control rtth rtflt rectifier dc out vitr ac conditioning tg1 tg2 C rcvn rcvp + x1 pt b2 rngng pr rpwr Cx1 i prog current-limit v cc nstat + v cc loop closure dc out circuit detector C ax a = 6 ndisc
4 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic description (continued) 5-8414 (f) * r dct and r dcr (optional) are only required to keep the nstat output at a steady state during the disconnect state. notes: t x = C2 db. r x = C4 db. termination = 600 w . hybrid balance = 600 w . ring trip optimized for 20 hz. figure 2. typical 600 w application circuit (only one channel shown) 7 r pt1a 30 l7591 tip ring fgnd v bat 1 2 3 4 8 6 5 ch 0 pta pra 35 36 x1 r ga r t1a vfxin1 vfro1 rxa C + gsx1 +2.4 v dx dr fsx1 fsr1 mclk v dd dx mclk fs0 6 11 12 9 13 14 1/2 t8503 r t2a r hba gnda1 dgnd to dtmf 20 17 19 18 10 Cx1 agnda bgnda c vbata r gna c proga c rta v bat C + C + C + C + rectifier r ttha r tflta r ttha r tflta v cca 75 m a nstata r proga i proga dc outa v cc lctha a = 6 ac conditioner 1/2 l8576 gain = 125 v/a c f1a , 0.22 m f, 100 v v cc 24 c vcc rngnga b2a tg1 tg2 r gx1a r gx2a r gx3a c tg1a cba r rng r cvpa v itra r pwra ax 25 42 31 30 28 29 44 43 1 41 40 37 32 33 34 27 26 23 39 v cc v dd v bat bgnd agnd dgnd fgnd +5 v C65 v gnd 0.1 m f 10 v 16.9 k w 2.2 k w 10 k w 0.1 m f 100 v 100 pf 10 v 0.33 m f 10 v 40.2 k w 154 k w dr codec 309 k w 41.2 k w r cvna 27.4 k w 27.4 k w 28.7 k w nstata slic r pr1a 30 51.1 k w 0.056 m f 50 v 383 k w 52.3 k w 0.1 m f 50 v 7.5 k w ndisca 38 10% polyester c f2a , 0.22 m f, 100 v 10% polyester (130 m a ringing) 5%, v bat r dct* 300 k w v bat r dcr* 300 k w r rng receiver 2 w r rcva 143 k w c c1a 0.1 m f 10 v c c2a 33 nf 10 v
lucent technologies inc. 5 data sheet october 2000 L8576B dual ringing slic pin information 12-3361(f).a figure 3. 44-pin plcc pin diagram table 1. pin descriptions * on the printed-wiring board (pwb), make the leads to bgnd and v bat as wide as possible for thermal and electrical reasons. also, maxi- mize the amount of pwb copper on all leads connected to this device for the lowest operating temperature. note: i u and o u indicate a pull-up device is included on this lead. pin, circuit a pin, circuit b symbol type name/function 11v bat * office battery supply. negative high-voltage power supply, nominally C65 v. 44 2 cf2 filter capacitor 2. connect 0.22 m f capacitor to agnd. 43 3 cf1 filter capacitor 1. connect 0.22 m f capacitor to agnd. 42 4 bgnd * battery ground. ground return for the battery supply and fault ground. 41 5 b2 i u state input. refer to operating states section. a pull-up device is included. 7 9 10 11 12 13 14 15 16 17 8 6 4 3 2 1 4443424140 5 18 20 21 22 23 24 25 26 27 28 19 39 37 36 35 34 33 32 31 30 29 38 ndisca pta rpwra vitra tg2a tg1a rtflta rttha ptb rpwrb ndiscb vitrb tg2b tg1b rtfltb rtthb rcvpb nstatb prb pra rngngb cf1b cf2b v bat bgndb b2b cf2a cf1a bgnda b2a rngnga nstata dc out rcvnb i prog a rcvpa rcvna v cc a i prog b v cc b agndb agnda dc out b rrng a
6 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic pin information (continued) table 1. pin descriptions (continued) * on the printed-wiring board (pwb), make the leads to bgnd and v bat as wide as possible for thermal and electrical reasons. also, maxi- mize the amount of pwb copper on all leads connected to this device for the lowest operating temperature. note: i u and o u indicate a pull-up device is included on this lead. pin, circuit a pin, circuit b symbol type name/function 40 6 rngng i u ringing input. refer to operating states section. a pull-up device is included. 39 7 nstat o u loop detector output/ring trip detector output. when low, this lead indi- cates an off-hook condition. when in ringing mode, a low output on this lead indicates a ring trip. a pull-up device is included. 38 8 ndisc i u disconnect input . refer to operating states section. a pull-up device is included. 37 9 rpwr power resistor. connect a resistor between this pin and v bat . a 2.2 k w , 2 w resistor should be used for a v bat of C68.5 v. see the applications section to calculate resistor values for other v bat potentials. 36 10 pt i/o protected tip. the input to the tip fault protection and output of tip current drive amplifier. connect this pin to the tip of the loop through a 30 w overvolt- age protection resistor. 35 11 pr i/o protected ring. the input to the ring fault protection and output of ring cur- rent drive amplifier. connect this pin to the ring of the loop through a 30 w overvoltage protection resistor. 34 12 vitr o transmit ac output voltage. this output is a voltage that is directly propor- tional to the differential tip/ring current. 33 13 tg2 transmit gain 2. transmit gain and current limiting for ringing is set by the value of r gx2 . r gx2 is connected between tg2 and vitr. 32 14 tg1 transmit gain 1. transmit gain is set by the series resistor combination of r gx1 and r gx2 from this lead to tg2. 31 15 rtflt ring trip filter. connect this lead to rtth via a resistor and to agnd with a capacitor to filter the ring trip circuit to prevent spurious responses. 30 16 rtth ring trip threshold. connect this lead to dc out via a resistor to set the ring trip threshold. 29 17 dc out o dc voltage out . this output is a voltage that is directly proportional to the absolute value of the differential tip/ring current. 28 18 i prog i current-limit program input. a resistor to dc out sets the dc current limit of the circuit. 27 19 rcvp i receive signal input (+). this high-impedance input controls the ac differen- tial voltage on tip/ring. 26 20 rcvn i receive signal input (C). this high-impedance input controls the ac differen- tial voltage on tip/ring. 25 21 agnd analog signal ground. 24 22 v cc analog 5 v power supply. 23 23 rrng ringing slope resistor. connect this lead to agnd with a resistor to set the slope of the ringing waveform. note that this pin is shared with both sections.
lucent technologies inc. 7 data sheet october 2000 L8576B dual ringing slic functional description refer to the architectural and application diagrams (figures 1 and 2, respectively). general the L8576B is a dual subscriber line interface circuit with each half of the device providing battery feed, supervision, and balanced ringing. it is designed to support short loops, typically on customer premises. the use of a single battery for both battery feed and ringing makes this device particularly advantageous where it is desirable to minimize power supply costs in small systems, such as terminal adapters. the tip and ring drive amplifiers are used with a very relaxed cur- rent limit to develop a trapezoidal, balanced ringing sig- nal. use of a nominal C65 v power supply allows for ringing of normal phones, whether equipped with a mechanical ringer, or a peak-detection type of ringing detector. while balanced ringing is not the norm world- wide, its use in short, customer premises loops is gain- ing popularity. in addition to the ringing and battery functions, the L8576B device provides the ac receive and transmit paths. also, integral within the device is an off-hook detection circuit and a ring trip detection circuit that have their outputs multiplexed on a single lead. thermal protection within the device is also provided, and an external resistor is used to drop the high battery voltage before applying loop current, thus allowing a significant portion of the power to be dissipated outside of the device. removing much of this power makes it possible to incorporate two complete circuits in a 44-pin, surface-mount package. protection the L8576B contains some overvoltage protection in addition to the thermal protection within the device. this protection, along with the associated tip and ring protection resistors, may be sufficient in some benign environments. however, if power line cross or lightning protection is desired, the use of an external protection circuit (such as the l7591 device from lucent technol- ogies microelectronics group) is highly recommended. the integrated thermal protection consists of a thermal shutdown circuit which places the tip/ring drivers in a high-impedance state when the temperature of the die exceeds 160 c. in thermal shutdown, all supervision states are undefined. tip/ring drivers the L8576B has two tip/ring drivers whose outputs are pt and pr. each driver operates as a current source capable of sinking or sourcing adequate ac signal bias current. in the normal talk operating mode, these driv- ers are current-limited at a nominal 24 ma to minimize the power dissipation of short loops. these amplifiers are also used to drive balanced ringing. during ringing, the current limit is raised to approximately 85 ma. the external resistor connected to the r pwr pin is used to dissipate power externally and also to drop the bat- tery voltage which is higher than normal in order to support balanced ringing. note that this external power dissipation is present during both ringing or normal bat- tery feed operation. power limitations restrict the dual device to actively ringing only one channel at a time; thus, ringing cadence must be used to ensure that only one channel is actively ringing at any given instant of time. in other words, to ring both channels at the same time, ring each channel during the quiet interval of the other channel. battery operation there are two v bat inputs to the device. pin 1 (v bat ) provides voltage to the entire slic and pins 9 and 37 (r pwr ) provide voltage to the individual tip and ring amplifiers of each channel through r pwr resistors. a shared current sourcing scheme is employed within the device. for loop currents below 20 ma, the v bat applied to pin 1 sources all of the loop current in addi- tion to driving internal circuitry. for loop currents greater than 20 ma, loop current is primarily provided through the r pwr resistors and the pin 1 v bat mainly powers internal circuitry. the r pwr resistors can be replaced by a lower-voltage auxiliary battery. operation with an auxiliary battery is described in the applications section of this document. transmit and receive interface the interface is suitable for direct coupling to a 5 v only codec. when interfacing a 5 v only codec, cou- pling capacitors are required. the transmit interface circuitry couples the differential voltage on tip and ring to transmit output vitr. the inverting input of the driving amplifier is available on lead tg1, so connecting a resistance between vitr and tg1 allows adjustment of the transmit gain (transconductance).
8 8 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic functional description (continued) transmit and receive interface (continued) a second gain setting is provided to accommodate ring trip. a switch is built into tg2. in ringing mode, tg1 and tg2 are internally connected, thus shorting out the external gain resistor r gx1 . this provides a lower trans- mit gain for ringing since ring trip is accomplished by monitoring the voltage at dc out . this lower gain sets dc out at the appropriate level to accommodate the higher currents of the ring trip. the receive interface circuitry couples the differential signal on receive inputs rcvp and rcvn to the tip/ring drivers. data interface a 4-wire parallel interface (b2, rngng, ndisc, and nstat) is provided for each channel to control signals to and from the system controller. b2 controls the for- ward/reverse battery in normal talk mode while rngng enables the balanced ringing mode of opera- tion, and ndisc performs a disconnect state. nstat reflects either the loop detector output or the ring trip detector output, depending on the mode of the section. it is the responsibility of the system controller to recog- nize ring trip detection and set rngng to a logic 0 state to terminate ringing. the system controller should also use rngng to set ringing cadence. loop current detector each section of the device has an integral loop current detector set at a nominal 12 ma of dc current. this is used to detect off-hook transitions in the normal talk state. when current less than the current threshold (including no current) is flowing, nstat is at logic 1. when loop current exceeds 12 ma, the output nstat switches to a logic 0. no hysteresis is included. operating states the L8576B device has four operating states: n talk statenormal battery: normal talk state. battery feed is connected to the battery supply (v bat ). both receive and transmit transmission paths are powered up. dc loop and instantaneous current limiters are powered up and active. nstat reflects the status of the switchhook detector. pr is negative with respect to pt. n talk statereverse battery: normal talk state. battery feed is connected to the battery supply (v bat ). both receive and transmit transmission paths are powered up. dc loop current limiter is powered up and active. nstat reflects the status of the switchhook detector. pr is positive with respect to pt. n ringing state: normal ringing state. both receive and transmit transmission paths are inactive. balanced ringing is applied to pr and pt, in accordance with b2. current limiter is set for ringing limit. nstat reflects the status of the ring trip detector. only one channel should be in this state at a time to control power dissipation. n disconnect state: tip and ring drive amplifiers are powered down. pins pt and pr are high impedance (>100 k w ). nstat is undefined. pt and pr voltage is undefined.
lucent technologies inc. 9 data sheet october 2000 L8576B dual ringing slic operating states (continued) these states are selected using three logic inputs, b2, rngng, and ndisc. b2 sets normal operation, either with forward or reverse battery. rngng overrides b2 and applies ringing with the polarity of tip and ring reversed on edges of the b2 signal. the slope of the waveform is determined by a resistor from rrng to agnd. logic input ndisc puts the device into a loop current denial state (disconnect). tip and ring amplifiers are saturated against ground with about a 100 a current source. this creates a level in the loop current sensing circuitry that approaches a loop closed state. some conditions on the tip and ring could cause the circuit to indicate loop closed even though the loop is open. this situation can be prevented by connecting a 300 k w resistor from v bat to each of the outputs of the tip and ring amplifiers (see figure 2). this will pull the amplifier output to about 30 v above v bat , keeping the nstat output at a steady high (on-hook indication) level. if the disconnect state is not used or the nstat output during the disconnect state is not recognized or used, then the resistors are not needed. table 2 below summarizes the operating input state coding. absolute maximum ratings (at t a = 25 c) stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect device reliability. note: the ic can be damaged unless all ground connections are applied before, and removed after, all other connections. furtherm ore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds its rat- ings. for example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvolta ge. table 2. input state coding ndisc rngng b2 state 101 forward battery, normal talk, and feed state. pin pt is positive with respect to pr. 100 reverse battery, normal talk, and feed state. pin pt is negative with respect to pr. 111 - ringing is applied to pt and pr. on the transition, pt starts towards a positive volt- age (with respect to pr). the endpoint of this state is pt at bgnd and pr at v bat . 110 ringing is applied to pt and pr. on the transition, pt starts towards a negative volt- age (with respect to pr). the endpoint of this state is pt at v bat and pr at bgnd. 00/10/1 disconnect state. the tip and ring amplifiers are turned off, and the slic goes into a high-impedance state (>100 k w ). parameter symbol min typ max unit 5 v dc supplies v cc C0.5 7.0 v office battery supply v bat C75 0.5 v logic input voltage C0.5 v cc + 0.5 v logic input clamp diode current, per pin 20 ma logic output voltage C0.5 v cc + 0.5 v logic output current, per pin 35 ma analog input voltage C7.0 7.0 v maximum junction temperature 165 c storage temperature range t stg C40 125 c relative humidity range (noncondensing) 5 95 % ground potential difference (bgnd to agnd) 3 v pt or pr fault voltage (dc) v bat C 5 3 v pt or pr fault voltage (10 s x 1000 s) v bat C 15 15 v
10 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic electrical characteristics generally, minimum and maximum values are testing requirements. however, some parameters may not be tested in production because they are guaranteed by design and device characterization. typical values reflect the design center or nominal value of the parameter; they are for information only and are not a requirement. minimum and maximum values apply across the entire temperature range (0 c to 70 c) and entire battery range (to C72 v). unless otherwise specified, typical values are defined as 20 c, v cc = 5.0 v, v bat = C68.5 v. positive currents flow into the device. table 3. operating conditions and powering 1. noncondensing. 2. the L8576B will operate below C24 v; C24 v is used for production test. 3. the termination impedance can be programmed up to 1200 w ; 1000 w are used for production test. 4. this parameter is not tested in production. it is guaranteed by design and device characterization. table 4. ring trip detector 1 1. this table is provided for information purposes only. 2. these parameters are not tested in production. parameter min typ max unit temperature range 0 70 c humidity range 5 95 1 %rh supply voltages: v cc v bat 4.75 C24 2 5.0 C65 5.25 C72 v v loop closure thresholddetection range 9.5 12 14.5 ma ac termination impedance programming range 300 600 1000 3 w on- and off-hook 2-wire signal level 3.14 dbm power supplypowerup, no loop current (per section): i cc i bat (v bat = C65 v) total power (one channel, v bat = C65 v) 4.5 3.0 230 5.5 4.0 290 ma ma mw power-supply rejection (see figures 6 and 7.): v cc (1 khz) v bat (500 hz3 khz) 35 45 db db thermal 4 : thermal resistance (still air) t j operating t j thermal shutdown temperature 47 160 150 c/w c c parameter 2 min typ max unit ringing source: frequency ( | ) r rng = 28.7 k w, r tth = 52.3 k w frequency ( | ) contact lucent for specific component values 17 20 20 23 50 hz hz c-message weighted noise (900 w )90dbrnc ren load (1386 w + 40 m f) with loop resistance = 30 w, r pt = 30 w, r pr = 30 w 40 vrms detection interval: 20 hz 3 25 hz 200 150 ms ms
lucent technologies inc. 11 data sheet october 2000 L8576B dual ringing slic electrical characteristics (continued) pretrip will not occur for the circuits shown below, per ta-909, 4.5.9. 12-2572(f).d figure 4. pretrip circuit table 5. battery feed 1. assumes 2 x 30 w external protection resistors. note the useful range of the device may be determined by the ringing or supervision range rather than the ac characteristics. 2. the longitudinal current is independent of dc loop current. 3. current limit i lim is programmed by a resistor, r prog , from pin i prog to pin dc out r prog (k w ) = 3.5 x (i lim C 9.2) ma. the current limit has a slope vs. loop voltage of 6 k w . to control power dissipation, it is recommended that the default current limits be utilized, i.e., r prog = 51.1 k w for 24 ma nominal loop current limit. 4. instantaneous current limit minimizes inrush current at the onset of an off-hook condition. inrush current is only limited wh en in the forward battery state. the device will settle into a dc loop current-limit value within 400 ms after off-hook. 5. ieee is a registered trademark of the institute of electrical and electronics engineers, inc. 6. assumes the external protection resistors are matched to 1%. 7. this parameter is not tested during production. it is guaranteed by design and device characterization. parameter min typ max unit loop resistance range 1 (3.17 dbm overload into 600 w ): i loop = 20 ma at v bat = C65 v 1000 w longitudinal current capability per wire 2 8.5 15 marms current limit 3 r loop = 100 w : dc loop instantaneous 4 20 50 24 60 28 70 ma ma tip or ring drive current = dc + longitudinal + signal currents 65 ma signal current 5 marms powerup open loop voltage level differential voltage (rngng = 0, ndisc = 1, b2 = 1, v bat = C65 v) |v bat + 10| v disconnect state: pt or pr current (v bat < v pt < 0 v) pt or pr resistance (v bat < v pt < 0 v) C1 100 1 ma k w dc feed resistance 60 70 w longitudinal to metallic balance ieee 5 standard 455 6 : 200 hz to 1 khz 1 khz to 3 khz 54 48 67 62 db db metallic to longitudinal (harm) balance 7 : 200 hz to 4 khz 35 db ring ring 10 k w 6 m f tip tip 200 w switch closes for less than 12 ms
12 12 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic electrical characteristics (continued) table 6. analog signal pins table 7. ac feed characteristics 1. requires external components connected as shown in the applications section. transmission characteristics are specified assum ing a 600 w resistive termination and 1% external resistors. 2. transmission characteristics are specified assuming a 600 w resistive termination; however, feedback using external components allows the user to adjust the termination impedance from 600 w . any complex impedance r1 + r2 || c between 300 w and 1000 w can be synthesized using external components. 3. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter min typ max unit differential pt/pr current sense (dc out ) gain (pt/pr to dc out ): forward battery (r gx1 = 16.9 k w , r gx2 = 7.5 k w ) reverse battery (r gx1 = 16.9 k w , r gx2 = 7.5 k w ) C235 235 C250 250 C265 265 v/a v/a pt/pr to vitr gain with r gx1 = 16.9 k w , r gx2 = 7.5 k w : forward battery reverse battery C121 121 C125 125 C129 129 v/a v/a loop closure detector threshold: programming accuracy 20 % rcvn, rcvp: input bias current gain rcvp to pt/pr gain rcvn to pt/pr 11.62 C11.62 12 C12 C1.0 12.38 C12.38 m a rcvn, rcvp input compliance C2.5 v cc v parameter 1 min typ max unit ac termination impedance 2 300 600 1000 w total harmonic distortion (200 hz4 khz) 3 : off-hook on-hook 0.3 1.0 % % transmit gain ( | = 1 khz) (see figure 5.): transmit accuracy in percent transmit accuracy in db (relative to 2/3) C3.0 C0.24 0 0 3.0 0.24 % db receive gain ( | = 1 khz) (see figure 5.): receive accuracy in percent receive accuracy in db C3.0 C0.24 0 0 3.0 0.24 % db tip/ring signal level (600 w reference) 3.14 dbm gain vs. frequency (transmit and receive; 1 khz reference) 3 : 200 hz3.4 khz 300 hz3.4 khz 3.4 khz20 khz 3.4 khz266 khz C1.00 C0.30 C3.0 0 0 C0.1 0.05 0.05 2.0 2.0 db db db db
lucent technologies inc. 13 data sheet october 2000 L8576B dual ringing slic electrical characteristics (continued) table 7. ac feed characteristics (continued) 1. requires external components connected as shown in figure 2. transmission characteristics are specified assuming a 600 w resistive ter- mination and 1% external resistors. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. 3. return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. guaranteed performa nce assumes 1% tolerance components. table 8. isolation between channels 1. these parameters are not tested in production. they are guaranteed by design and device characterization. table 9. data interface and logic 1. all logic voltages are referenced to agnd. parameter 1 min typ max unit gain vs. level (transmit and receive; 0 dbv reference) 2 : C50 db to +3 db C0.05 0 0.05 db return loss 3 : 200 hz500 hz 500 hz3400 hz 20 26 24 29 db db transhybrid loss 3 : 200 hz500 hz 500 hz2500 hz 2500 hz3400 hz 20 26 26 24 29 29 db db db idle-channel noise (tip/ring): psophometric 2 c-message 3 khz flat 2 C77 12 20 dbmp dbrnc dbrn idle-channel noise (xmt): psophometric 2 c-message 3 khz flat 2 C77 12 20 dbmp0 dbrnc0 dbrn0 parameter 1 min typ max unit interchannel small-signal crosstalk. (both channels in forward or reverse battery state.) (2-wire to 2-wire, 2-wire to 4-wire, 4-wire to 4-wire.) C90 C80 db impulse noise. (one channel ringing, other channel in forward or reverse battery state.) 40 47dbrnc0 parameter 1 symbol min typ max unit high-level input voltage (b2, rngng, and ndisc) v ih 2v cc v low-level input voltage (b2, rngng, and ndisc) v il 00.7 v input bias current (high) (b2, rngng, and ndisc) i ih C40 C100 m a input bias current (low) (b2, rngng, and ndisc) i il C75 C200 m a high-level output voltage (nstat, open collector with inter- nal pull-up resistor): (i out = C20 m a) (i out = C1 m a) v oh v oh 2.4 4.3 5.0 v cc v v low-level output voltage (nstat, open collector with internal pull-up resistor) (i out = 250 m a) v ol 00.20.4 v
14 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic test configurations 12-3360(f)a figure 5. basic test circuit b2 v bat v bat bgnd v cc agnd v cc 0.1 m f 0.1 m f pt i prog tg1 vitr rngng cf1 0.22 m f rcvp rcvn 0.22 m f cf2 r loop l8576 slic 25 w tip 600 w pr 25 w ring r prog dc out 51.1 k w rtth rtflt rpwr rrng 2.2 k w v bat 383 k w 52.3 k w 0.056 m f0.1 m f r gx1 7.5 k w r gx2 16.9 k w tg2 xmt 88.7 k w 442 k w rcv nstat 28.7 k w r pt r pr r pwr r rng r tth r tflt c f2 c f1 r rcv r g 127 k w r t1 r gx3 10 k w c tg 100 pf 0.22 m f 12-2582a(f) figure 6. metallic psrr 12-2583a(f) figure 7. longitudinal psrr v s 4.7 m f 100 w v bat or v cc disconnect v t/r v bat or v cc pt pr basic test circuit + C psrr = 20log v s v t/r 900 w bypass capacitor v s 4.7 m f 100 w v bat or v cc disconnect bypass capacitor 56.3 w v bat or v cc pt pr basic test circuit psrr = 20log v s v m 67.5 w 10 m f 10 m f 67.5 w v m + C
lucent technologies inc. 15 data sheet october 2000 L8576B dual ringing slic test configurations (continued) longitudinal balance = 20log 12-2584(f)b figure 8. longitudinal balance 12-2585(f).r1 figure 9. longitudinal impedance 12-2587(f) figure 10. ac gains applications characteristic curves figures 1116 display typical room temperature read- ings. 12-3507(f) note: gain is normalized to 0 db. figure 11. receive gain and hybrid balance vs. frequency 12-3508 note: gain is normalized to 0 db. figure 12. transmit gain and return loss vs. frequency tip ring basic test circuit 365 w 100 m f 100 m f 365 w v m + C v s v s v m ------ - pt pr basic test circuit + C + C i long i long v pt v pr z long = or d v pt d i long d v pr d i long pt pr basic test circuit 600 w v t/r + C g xmt = v xmt v t/r g rcv = v t/r v rcv xmt rcv v s frequency (hz) 0.1k 100k C30 C20 C10 10k C60 C50 C40 1k decibels (db) 0 hybrid balance receive gain frequency (hz) 0.1k 100k C35 C20 C10 10k C50 C45 C40 1k decibels (db) return loss transmit gain C5 C15 C25 C30 C55 0
16 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic applications (continued) characteristic curves (continued) 12-3503 (f) note: r prog = 51.1 k w . figure 13. loop current vs. loop voltage 12-3506 (f) note: r prog = 51.1 k w . figure 14. loop current vs. loop resistance 12-3504 (f) figure 15. slic power dissipation vs. loop resistance (v bat = C48 v) 12-3505 (f) figure 16. slic power dissipation vs. loop resistance (v bat = C65 v) 10 20 30 40 50 0 loop voltage (v) 15 50 60 0 10 5 45 40 35 30 25 20 loop current (ma) v bat = C65 v v bat = C48 v 0 15 50 10 5 45 40 35 30 25 20 200 400 600 800 1000 loop resistance ( w ) 2000 0 loop current (ma) 1200 1400 1600 1800 v bat = C48 v v bat = C65 v 200 400 600 800 1000 0 loop resistance ( w ) 500 1500 2000 0 1000 slic power dissipation (mw) 1200 1400 1600 1800 2 ch 1 ch 200 400 600 800 1000 0 loop resistance ( w ) 500 1500 2000 0 1000 slic power dissipation (mw) 1200 1400 1600 1800 2 ch 1 ch
lucent technologies inc. 17 data sheet october 2000 L8576B dual ringing slic applications (continued) dc design battery feed the dc feed characteristic can be described by: where: i l = dc loop current. v t/r = dc loop voltage. |v bat | = battery voltage magnitude. v oh = overhead voltage. this is the difference between the battery voltage and the open loop tip/ring voltage. r l = loop resistance, not including protection resistors. r p = protection resistor value. r dc = slic internal dc feed resistance. the design begins by drawing the desired dc template. an example is shown in figure 17. 12-3503.a (f) figure 17. loop current vs. loop voltage starting from the on-hook condition and going through to a short circuit, the curve passes through two regions: region 1: on-hook and low loop currents. in this region, the slope corresponds to the dc resistance of the slic, r dc (typically 60 w ). the open circuit voltage is the battery voltage less the overhead voltage of the device, v oh (default is 7.1 v typical). these values are suitable for most applications. region 2: current limit. the dc current is limited to a val- ue determined by external resistor r prog . this region of the dc template has a high resistance (6 k w ). calculate the external resistor as follows: r prog (k w ) = 3.5 x (i lim C 9.2) ma * to control power dissipation, it is recommended that a 51.1 k w r prog resistor be used to set a default current- limit value of 24 ma. r pwr the r pwr resistors dissipate the excess power associ- ated with a single power supply, short-loop application. the resistor provides v bat to tip and ring amplifiers. there is one resistor associated with each channel. the value of r pwr is dependent upon the battery potential and the current-limit value. the value of r pwr can be determined by using the following equation: r pwr = power dissipation of the resistor is: w rpwr = (i lim C 0.003) 2 r pwr . for the recommended C68.5 v v bat and 24 ma i lim design, a 2.2 k w , 2 w resistor is suitable. 2 w resistors are available as surface-mount components. overhead voltage in order to drive an on-hook ac signal, the slic must set up the tip and ring voltage to a value less than the battery voltage. the amount that the open loop voltage is decreased relative to the battery is referred to as the overhead voltage and is expressed as: v oh = | v bat | C (v pt C v pr ) without this buffer voltage, amplifier saturation will occur and the signal will be clipped. the l8576 is auto- matically set at the factory to allow undistorted on-hook transmission of a 3.17 dbm signal into a 900 w loop impedance. the drive amplifiers are capable of 4 vrms minimum (v amp ). so, the maximum signal the device can guaran- tee is: for normal forward or reverse battery operation, over- head voltage is internally set to about 8 v. in ringing mode, the overhead voltage is automatically decreased to about 4 v to permit passage of a larger ring signal. * during the balanced ringing mode, the current limit is increased from the value predicted by this equation by a factor of 3.5. i l v bat v oh C r l 2r p r dc ++ --------------------------------- - = v t/r v bat v oh C () r l r l 2r p r dc ++ -------------------------------------------- = 10 20 30 40 50 0 loop voltage (v) 15 50 60 0 10 5 45 40 35 30 25 20 loop current (ma) v bat = C65 v v bat = C48 v 1 6 k w C1 rdc v bat 22.3 C i lim 0.003 C ---------------------------- - v t/r 4 v z t/r z t/r 2r p + -------------------------- ? ?? =
18 18 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic applications (continued) dc design (continued) off-hook detection the loop closure comparator has built-in longitudinal rejection, eliminating the need for an external 60 hz fil- ter. the loop closure detection threshold is internally set at 12 ma. power ringing the L8576B is designed to generate a balanced trape- zoidal power ring signal to tip and ring. because the L8576B generates the power ringing signal, no ring relay is needed in this mode of operation. alternatively, the L8576B slic can be used in a battery-backed, unbalanced ringing application. in this case, the ring signal is generated by a central ring generator and is bused to individual tip/ring pairs. a ringing relay is used during ringing to disconnect the L8576B from, and apply the ring generator to, the tip and ring pair. this section discusses in detail the use of the L8576B in the balanced mode of operation. crest factor the balanced ring signal is generated by simply tog- gling between the powerup forward and reverse battery states. the state change is done by applying a square wave (whose frequency is the desired ring frequency) to logic input b2. capacitors cf1 and cf2 and resistor r rng are used to control or ramp the speed of the tran- sition of the battery reverse, thus shaping the balanced ring signal. setting capacitor cf1 = cf2 = 0.22 m f and setting r rng to 28.7 k w provides a crest factor of 1.3 for a 20 hz ring frequency. this satisfies the telcordia * ta-909 requirement of ringing waveform crest factor between 1.2 and 1.6. crest factor is defined as the peak to rms voltage ratio of the ring signal. ringing waveforms of crest factors 1.6 and 1.2 are shown in figures 18 and 19. the crest factor can be adjusted by the value of r rng and will be influenced slightly by the value of v bat . the cf1 and cf2 capacitors should not be changed because these affect the dc feedback loop stability in current limit. an r rng value of 22.6 k w will lower the crest factor to about 1.2 with a C65 v or C72 v battery for a 20 hz ring frequency. likewise, an r rng value of 34.8 k w will raise the crest factor to about 1.4. for ring frequencies greater than 20 hz, the r rng value should be lowered until the desirable crest factor is achieved. note the rrng is common to both sec- tions of the device. cf1 and cf2 must exhibit a stable capacitance value over its voltage range to ensure a properly shaped waveform. do not use a ceramic capacitor for cf1 and cf2; use a capacitor with a polyester, polypropylene, polycarbonate, or polystyrene dielectric. 12-3346a (f) notes: slew rate = 5.65 v/ms. trise = tfall = 23 ms. pwidth = 2 ms. period = 50 ms. figure 18. ringing waveform crest factor = 1.6 12-3347a (f) notes: slew rate = 10.83 v/ms. trise = tfall = 12 ms. pwidth = 13 ms. period = 50 ms. figure 19. ringing waveform crest factor = 1.2 * telcordia is a registered trademark of bell communications research, inc. time (s) C80 C60 C40 C20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v) time (s) C80 C60 C40 C20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v)
lucent technologies inc. 19 data sheet october 2000 L8576B dual ringing slic applications (continued) power ringing (continued) power ringing load telcordia ta-909 specifies that a minimum 40 vrms must be delivered to a 5 ren ringing load of 1386 w + 40 m f. for 5 ren load, it is recommended that v bat be set to C68.5 vdc. during the power ring state, the dc current limit is automatically boosted by a factor of 3.5 over the current limit set by resistor r prog . both of these factors are necessary to ensure delivery of 40 vrms to the north american 5 ren ringing load of 1386 w + 40 m f. ring trip ring trip is accomplished by filtering the voltage seen at node dc out and applying it to the integrated ring trip comparator. dc out is a voltage proportional to the tip/ ring current, and under short dc loop conditions, on- hook ringing current and off-hook current provide suffi- cient voltage differential at dc out to distinguish that a ring trip condition has occurred. the ring trip compara- tor threshold is set via a resistor between the ring trip comparator and dc out . the output of nstat is automatically set to detect ring trip during the balanced ring mode. during quiet inter- vals of ringing, the output of nstat is automatically determined by the loop closure detector. refer to figure 2 for the following discussion. capacitor c rt in conjunction with resistor r tflt form a single-pole, low-pass filter that smooths the voltage seen at dc out . the pole of the filter will influence both the ripple seen at dc out and the speed of the transi- tion of the voltage at dc out from the pretrip to the tripped level. to determine the low-pass pole: f(hz) = using the recommended 383 k w r tflt resistor and the 0.1 f c rt capacitor, the low-pass pole is set at 4.15 hz. the loop current at ring trip is given by: i loop(trip) = 7.76 ma using the recommended 52.3 k w r tth resistor and the 7.5 k w r gx2 resistor in a 20 hz ringing application, the ring trip threshold current is set for 54 ma. reference design for isdn ta applications for a complete reference design, please refer to the pots for isdn, wll, and fitl/fith applications, featuring ringing slic solutions application note, which provides a detailed discussion of the reference design functionality. the design presented utilizes a dc to dc converter and requires only a +5 v and a +12 v supply to operate. the schematic in figure 2 of this document portrays the slic and codec portions of that design. ac design there are four key ac design parameters. termination impedance is the impedance looking into the 2-wire port of the line card. it is set to match the impedance of the telephone loop in order to minimize signal reflec- tions back to the telephone set. transmit gain is mea- sured from the 2-wire port to the pcm highway, while receive gain is measured from the pcm highway to the 2-wire port or telephone loop. finally, the hybrid balance circuit cancels the unwanted amount of the received signal that appears at the transmit port. 1 2 p r tflt () c rt () ---------------------------------------------- - r tth r gx2 -------------- - ? ??
20 20 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic applications (continued) ac design (continued) example 1, real termination the following design equations refer to the circuit in figure 20. use these to synthesize real termination impedance. termination impedance: receive gain: transmit gain: hybrid balance: to optimize the hybrid balance, the sum of the currents at the vf x in input of the codec op amp should be set to 0. the following expressions assume the hybrid bal- ance network is the same as the termination imped- ance: z t v t/r i t/r C ---------- = z t 2r p 1500 1 r t1 r gp -------- - r t1 r rcv ----------- - ++ ----------------------------------- + = g rcv v t/r v fro ----------- = g rcv 12 1 r rcv r t1 ----------- r rcv r gp ----------- - ++ ? ?? 1 z t z t/r -------- - + ? ?? ------------------------------------------------------------------ = g tx v gsx v t/r -------------- - = g tx r x r t2 ---------- 125 z t/r ----------- = h bal 20 v gsx v t/r ----------- ? ?? log = r hb r x g rcv g tx -------------------------- = h bal 20 r x r hb -------- - g rcv g tx C ? ?? log = 12-2554.o (f) figure 20. ac equivalent circuit using a t8503 codec r p z t + C r p v t/r i t/r v s z t/r + C pr a v = C1 a v = 1 vitr C + + C current sense pt tg r gx + C r t1 r rcv r hb r t2 rcvn rcvp rx gsx vf x in vf r o 1/2 t8503 codec r gp +2.4 v 125 v/a 1/2 l8576 slic ax a v = 6
lucent technologies inc. 21 data sheet october 2000 L8576B dual ringing slic applications (continued) ac design (continued) example 2, complex termination the gain shaping required of a complex termination impedance can be synthesized using the internal ax amplifier. the following discussion and equations present a method for selecting proper component val- ues for the slic/codec interface when using a complex termination. complex termination is usually of the form: 5-6396(f) to work with this application, convert termination to the form: 5-6397(f) where: r 1 = r 1 + r 2 r 2 = (r 1 + r 2 ) c = c for the following discussion, refer to figure 21. r tgp /r tgs /c tgs (z tg ): these components give gain shaping to get good gain flatness. these components are a scaled version of the specified complex termina- tion impedance. note for pure (600 w ) resistive termi- nations, components r tgs and c tgs are not used. resistor r tgp is used and is the series resistance com- bination of r gx1 and r gx2 or 24.4 k w . r x /r t2 : with other components set, the transmit gain (for complex and resistive terminations) r x and r t2 are varied to give specified transmit gain. r t1 /r rcv /r gp : for both complex and resistive termina- tions, the ratio of these resistors set the receive gain. for resistive terminations, the ratio of these resistors set the return loss characteristic. for complex termina- tions, the ratio of these resistors set the low-frequency return loss characteristic. c n /r n1 /r n2 : for complex terminations, these compo- nents provide high-frequency compensation to the return loss characteristic. for resistive terminations, these components are not used. r cvn is connected to ground via a resistor. r hb : sets hybrid balance for all terminations. set z tg gain shaping: z tg = r tgp || r tgs + c tgs which is a scaled version of z t/r (the specified termination resistance) in the r 1 || r 2 + c form. r tgp must be 24.4 k w to set slic transconductance to 125 v/a. r tgp = 24.4 k w at dc, c tgs and c are open. r tgp = m x r1 where m is the scale factor. m = it can be shown: r tgs = m x r2 and c tgs = r 2 c r 1 r 1 c r 2 r 1 r 2 ------- r 2 r 1 r 2 + --------------------- ? ?? 2 24.4 k w r 1 ----------------------- - c m ------
22 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic applications (continued) ac design (continued) 5-6400a(f) figure 21. ac interface circuit using first-generation codec (blocking capacitors not shown) r tgs r tgp = 24.4 k w v itr r t2 r x r t1 r hb codec output drive amp codec op amp C + c n r n1 r n2 r gp r rcv rcvn rcvp Ci t/r 195 c tgs ax transmit gain transmit gain will be specified as a gain from t/r to pcm, t x (db). since pcm is referenced to 600 w and assumed to be 0 db, and in the case of t/r being refer- enced to some complex impedance other than 600 w resistive, the effects of the impedance transformation must be taken into account. again specified complex termination impedance at t/r is of the form: 5-6396(f) first calculate the equivalent resistance of this network at the midband frequency of 1000 hz. r eq = using r eq , calculate the desired transmit gain, taking into account the impedance transformation: t x (db) = t x (specified[db]) + 20log t x (specified[db]) is the specified transmit gain. 600 w is the impedance at the pcm and r eq is the impedance at the t/r. 20log represents the power loss/gain due to the impedance transformation. note in the case of a 600 w pure resistive termination at t/r 20log = 20log = 0. thus, there is no power loss/gain due to impedance transformation and t x (db) = t x (specified[db]) . finally, convert t x (db) to a ratio, g tx : t x (db) = 20log g tx the ratio of r x /r t2 is used to set the transmit gain: = g tx x with a dual lucent codec such as t8503 r x < 200 k w r 2 c r 1 2 p f () 2 c 1 2 r 1 r 2 2 r 1 r 2 ++ 12 p f () 2 r 2 2 c 1 2 + ----------------------------------------------------------------------------- ? ?? 2 2 p f r 2 2 c 1 12 p f () 2 r 2 2 c 1 2 + -------------------------------------------------- - ? ?? 2 + 600 r eq ---------- - 600 r eq ---------- - 600 r eq ---------- - 600 600 --------- - r x r t2 ---------- 195 m --------- -
lucent technologies inc. 23 data sheet october 2000 L8576B dual ringing slic applications (continued) ac design (continued) receive gain ratios of r rcv , r t1 , r gp will set both the low-frequency termination and receive gain for the complex case. in the complex case, additional high-frequency compen- sation, via c n , r n1 , and r n2 , is needed for the return loss characteristic. for resistive termination, c n , r n1 , and r n2 are not used and r cvn is tied to ground and a resistor. determine the receive gain, g rcv , taking into account the impedance transformation in a manner similar to transmit gain. r x (db) = r x (specified[db]) + 20log r x (db) = 20log g rcv then: g rcv = and low-frequency termination z ter(low) = + 2r p r eq 600 ---------- - 6 1 r rcv r t1 --------------- r rcv r gp --------------- ++ ----------------------------------------------- - 1500 1 r t1 r gp ----------- - r t1 r rcv --------------- ++ -------------------------------------------- z ter(low) is the specified termination impedance assum- ing low frequency (c or c is open). r p is the series protection resistor. these two equations are best solved using a computer spreadsheet. next, solve for the high-frequency return loss compen- sation circuit, c n , r n1 , and r n2 : c n x r n2 = c tgs x r tgp r n1 = r n2 there is an input offset voltage associated with nodes r cvn , r cvp . to minimize the effect of the mismatch of this voltage at t/r, the equivalent resistance to ac ground at r cvn should be approximately equal to that at r cvp . refer to figure 22 (schematic with dc blocking capacitors). to meet this requirement, r n2 = r gp || r t1 . hybrid balance set the hybrid cancellation via r hb . r hb = if a +5 v only codec such as a lucent t8503 is used, dc blocking capacitors must be added as shown in figure 22. this is because the codec is referenced to +2.5 v and the slic to ground. with the ac coupling, a dc bias at t/r is eliminated and power associated with this bias is not consumed. 2r p 1500 ------------ - 1500 2r p ------------ - r tgs r tgp ------------- - ? ?? 1 C r x g rcv g tx --------------------------------- - 5-8413 (f) figure 22. ac interface circuit using first-generation codec (including blocking capacitors) r tgs r tsp = 24.4 k w v itr r x r hb codec output drive amp codec op amp C + c c1 r t1 r gp r n2 r rcv rcvn rcvp Ci t/r 195 c tgs c b ax c c2 c n r n1 r t2
24 24 lucent technologies inc. data sheet october 2000 L8576B dual ringing slic applications (continued) ac design (continued) typically, values of 0.1 f to 0.47 f capacitors are used for dc blocking. the addition of blocking capaci- tors will cause a shift in the return loss and hybrid bal- ance frequency response toward higher frequencies, degrading the lower-frequency response. the lower the value of the blocking capacitor, the more pro- nounced the effect is, but the cost of the capacitor is lower. it may be necessary to scale resistor values higher to compensate for the low-frequency response. this effect is best evaluated via simulation. a pspice * model for the L8576B is available. design equation calculations seldom yield standard component values. conversion from the calculated value to standard value may have an effect on the ac parameters. this effect should be evaluated and opti- mized via simulation. use of an auxiliary battery supply a second lower-voltage battery supply can be used with the L8576B in order to lower the overall power consumption on a short-loop design. for long loops, any power savings will be negated, since long loops are supplied by the main battery voltage. the auxiliary battery would be connected to pins 9 and 37 in lieu of the r pwr resistors. when the external r pwr resistors are removed, more power will be dissipated in the slic so internal slic power dissipation must be examined. first, determine the auxiliary battery voltage: the auxiliary battery should be set 8 v greater than the maximum tip/ring loop voltage on the longest allowed loop, when both channels are off-hook and in current limit. aux bat (max) = [(i lim x r loop ) + v oh ] tol vbat where: i lim = dc current limit set by r prog (usually 0.024). r loop = maximum loop resistance supported (tele- phone plus line resistance plus protection resistors). v oh = overhead voltage. tol vbat = battery tolerance, for a battery tolerance of 5%, use 1.1. for example, using the recommended 24 ma current limit, an overhead voltage of 8 v, and a maximum loop length of 550 w , the maximum auxiliary battery voltage is 23.3 v. next, calculate the power dissipated in the slic: components of the slic power dissipation are quies- cent power of v cc and v bat and loop current associ- ated with v bat and aux bat. these can be calculated as follows: w vcc(quiescent) = v cc x i cc(max)(quiescent) x 2 channels. w vbat(quiescent) = |v bat(max) | x i bat(max)(quiescent) x 2 chan- nels. w vbat(loop current) = (|v bat(max) | C 4 v) x 3 ma x 2 chan- nels. w aux bat(loop current) = (|aux bat (max) | C 4 v) x (i lim C 3 ma) x 2 channels. where: 4 v is the minimum overhead voltage, and 3 ma is v bat s contribution to loop current. for example, substituting values from the data sheet: v cc = 5 v i cc(max)(quiescent) = 5.5 ma v bat(max) = C70 v i bat(max)(quiescent) = 4 ma aux bat (max) = C23.3 v i lim = 24 ma the following powers are calculated: w vcc(quiescent) = 5 x 0.0055 x 2 = 0.055 w vbat(quiescent) = |C70| x 0.004 x 2 = 0.56 w vbat(loop current) = (|C70| C 4) x 0.003 x 2 = 0.396 w aux bat(loop current) = (|C23.3| C 4) x (0.024 C 0.003) x 2 = 0.8106 the sum of the four powers is 1.822 w. finally, calculate the maximum ambient tempera- ture allowed for the calculated power dissipation: t a(max) = t j C (r q ja x p diss slic(max) ) the l8576s 44-pin plcc exhibits a 43 c/w thermal resistance if in an enclosure with natural airflow. the maximum operating temperature of the slic is 150 c. thermal shutdown occurs typically at 160 c. for example: t a(max) = 150 C (43 x 1.822) = 150 C 78.4 = 71.7 c the above scenario would allow operation up to 70 c. * pspice is a registered trademark of cadence design systems, inc.
lucent technologies inc. 25 data sheet october 2000 L8576B dual ringing slic outline diagram 44-pin plcc dimensions are in millimeters. 5-2506(f).r8 4.57 max 1.27 typ 0.53 max 0.10 seating plane 0.51 min typ 1 640 7 17 29 39 18 28 pin #1 identifier zone 16.66 max 17.65 max 16.66 max 17.65 max
l u cent t e chnolo g ies inc . res e rves t he r i g ht t o mak e cha n ges t o th e pro d uct(s ) o r info r matio n cont a ined h erei n withou t notice . n o liabilit y i s assu m ed as a r esult o f thei r use or a pplicatio n . no r ights u n der a ny pa t ent acc o mpa n y the s a le of a ny such p rod u ct(s ) or in f orm a tion. co p yrigh t ? 200 0 luce n t t echn o logies i n c. all rights res e rved octo b er 2000 ds01 - 013alc (replaces d s 00-121 a lc) d a t a s h e et october 2000 L8576B dual ringing slic f o r a d d i ti o n a l i n fo r m a t i o n , c o n ta c t y o u r m i c r o e l e c t r o n i c s g r o u p a cc o u n t m a n a ge r o r t h e f o l l o wi n g: i n terne t : http://ww w .lucent.com/micro e-m a il: do c m a ste r @mi c ro . luc e nt.com n . a m e r ic a : m i c r o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s i n c ., 5 5 5 u n i o n b o u l e v a r d , r o o m 3 0 l - 1 5 p - b a , a l l e nt o wn , p a 1 8 1 0 9 - 3 2 86 1 - 80 0 - 37 2 - 2 4 4 7 , f a x 6 1 0 - 7 1 2 - 4 10 6 ( i n c a n a d a : 1 - 8 0 0 - 5 5 3 - 2 44 8 , f a x 6 1 0 -7 1 2 - 4 1 0 6 ) a s i a p a cif i c : m i c r o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s s i ng a p o r e p t e . l t d., 7 7 s c i e n c e p a r k d r i v e, #0 3 - 1 8 c i nt e c h i i i, s i n g a p o r e 1 1 8 2 56 t el . ( 6 5 ) 77 8 8 83 3 , f a x ( 6 5 ) 7 7 7 74 9 5 c h i n a: m i c r o e l e c t r o n i cs g r o u p, l u c e n t t e c h n o l og i e s ( c h i na ) c o., l td . , a - f 2 , 2 3 / f , za o fo n g u n i v e r s e b u i l d i n g , 1 8 0 0 zh o ng s h an x i r o a d , s h a n g h ai 2 00 2 3 3 p . r. ch i na t e l . ( 8 6 ) 2 1 6 4 4 0 0 4 6 8 , e x t . 3 2 5 , f a x ( 86 ) 21 64 4 0 06 5 2 j a p a n : m i cr o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s j a pa n l t d., 7 - 1 8 , h i g a s h i - got a n d a 2 - c h o m e, s h i n a g aw a - k u , t o k y o 1 4 1, j a p a n t e l . ( 8 1) 3 5 4 21 1 60 0 , f a x ( 8 1 ) 3 5 4 2 1 17 0 0 e u r op e : d at a r e qu e s t s : m ic r o e l e ct r oni c s g r ou p d a t a l i n e : t el . ( 44 ) 70 0 0 5 8 2 3 6 8 , f a x ( 44 ) 1 1 8 9 3 2 8 1 48 t e c h n i c a l in q u i r i e s : g e r ma n y : ( 4 9 ) 89 9 5 0 8 6 0 (munich ) , united kingdom: ( 4 4 ) 1 3 4 4 8 6 5 9 0 0 ( a scot) , f r a n ce: ( 3 3 ) 1 4 0 8 3 6 8 0 0 (p a r i s), s we d e n : ( 4 6) 8 5 9 4 6 07 00 (stockholm), f inl a nd: ( 3 5 8 ) 9 3 5 0 76 7 0 (h e ls i n k i), i t a l y : ( 3 9 ) 0 2 6 6 0 8 13 1 (m i l a n ) , s p a i n : ( 3 4 ) 1 8 0 7 1 4 4 1 (madrid) ordering information dev i ce part no. description package comcode l u cl8 5 76bp-d dual slic 4 4 -pin plcc (dry- b agg e d) 1 08 1 31 2 85 l u cl8 5 76bp-dt dual slic 4 4-pin plc c ( t a p e a n d r e el, dry-b a gge d ) 1 08 1 31 2 93

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